The AI Memory Capacity Expansion Race and the Late-Cycle Capex Boom
At Computex 2026, the world's leading memory manufacturers announced massive capital expenditure and capacity expansion plans to address a structural supply gap. Industry sources estimate that current memory capacity can only satisfy around 50% of the medium- to long-term demand from global Big Tech firms.
The scale of the announced investments is staggering, presenting the classic "late-cycle tell" where all major players aggressively add capacity simultaneously to capture high-margin demand:
- SK Hynix: Chairman Chey Tae-won announced plans to double total wafer capacity over the next five years, predicting the memory shortage could persist through 2030. The company's 2026 capex is projected to surpass KRW 30 trillion (~$21 billion). It is investing KRW 31 trillion (~$22.5 billion) in its first Yongin cluster fab (Y1), targeting 300,000 wafers/month by the end of 2027. Its Cheongju M15X fab is ramping in 2026 to reach a total DRAM capacity target of 620,000 wafers per month by H2 2026 (nearly double 2023 levels).
- Samsung: Projected 2026 capex is expected to reach ~$20 billion (up 11% YoY), focused on advanced process nodes and its P4L facility.
- Micron: Projected 2026 capex is $13.5 billion (up 23% YoY), with initial wafer output at its Boise, Idaho, fab slated for mid-2027.
While executives argue that this upcycle is structurally different due to the immense wafer penalty of HBM—which requires 3x to 4x more wafer capacity than DDR5 for the same bits—the simultaneous buildout of multi-billion dollar fabs (like Yongin Y1, Cheongju M15X, Samsung P4L, and Micron Boise) sets the stage for a potential supply glut once these facilities come online fully in 2027–2028.