Nvidia Opens the Stack: Vera Rubin Rack Designs Published, USFP Optics with Cisco, and Facility Standards Co-Written with AMD, Google and Meta
A new front in the capex story: at the OCP Global Summit (Oct 12, San Jose), Nvidia answered the two pressures bearing on its story — substitution silicon's efficiency claims and the power/credit bottleneck — by opening its hardware designs and co-writing the industry's standards.
The optics standard. Nvidia and Cisco announced USFP (Ultra-Dense Small Form Factor Pluggable), "designed to be the first module to support 400Gb/s-per-lane electrical signals, enabling capacity up to 12.8Tb/s," delivering "4x the bandwidth density and 1.3x the power efficiency of 200Gb/s-per-lane optics1," with TE Connectivity and Amphenol building a multi-source ecosystem and an open industry specification to follow (NVIDIA newsroom). The framing is pure capex-efficiency: "Moving more data per watt and per switch helps operators make better use of their infrastructure investments."
The designs and the facility specs. Nvidia "contributed its Vera Rubin rack and compute tray designs through its open MGX architecture2" (MGX 1.2 supports rack deployments up to 250kW with liquid cooling), joined "AMD, Google and Meta in publishing version 0.7 of the Open Data Center Specification" covering power architecture, cooling and physical layout, and with Google, Meta and Microsoft published the OCP Grid Resilience Specification — AI facilities that "return to near-full load in less than two seconds" after grid disruptions (Economic Times). Meta is adopting Spectrum-6 (102.4 Tb/s switching) for its next-generation AI infrastructure.
The quotes. Gilad Shainer, NVIDIA SVP: "Building the world's largest AI factories starts with rethinking the smallest of connections... With USFP, NVIDIA and Cisco are building an ecosystem to reinvent pluggable optics — connecting more computing with greater efficiency to power the next generation of AI factories." Bill Gartner, Cisco SVP: "AI builders need an interconnect architecture that can scale performance without locking them into a more complex operating model."
Meaning. Three weeks after Microsoft's Maia 300 claimed 40% more tokens per megawatt than "leading GPU-based systems" (Custom Silicon: Microsoft's Maia 300 Claims 40% More Tokens per Megawatt Than "Leading GPU-Based Systems" — the Second First-Party Inference Chip in Three Weeks), Nvidia's counter is to make the efficiency argument structural rather than proprietary: publish the rack blueprints, standardize the optics and the facility power path with the very companies building alternatives (AMD, Google), and keep Spectrum-X/CUDA at the center of an open spec. For the capex story this is Nvidia working to lower the dollars-per-useful-token of the installed trajectory — the strongest available answer to the "useful yield" push (Microsoft's "Useful Yield" Push Puts Nvidia's AI Economics and Hardware Pricing Power to the Test) and to the permitting/power vise (The Permitting Vise Tightens: Finland Orders Google to Halt Two Sites, Texas Freezes Permits, NV Energy Sues Tract). It also hedges the substitution threat: if first-party ASICs take inference share, Nvidia wants the racks, optics and facilities around them to still be Nvidia-shaped.
-
An instance of When megawatts ration the buildout, market share goes to the most tokens per watt — With megawatts the binding constraint, the vendor competes by codifying data-moved-per-watt efficiency into open industry specs rather than proprietary benchmarks. ↩︎
-
An instance of The AI silicon war has moved from benchmarks to open standards and open code. — The incumbent answers efficiency and substitution threats by publishing blueprints and co-writing standards with its rivals' patrons, moving the silicon war from benchmarks to open specs that keep every alternative Nvidia-shaped. ↩︎